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FIN1002 LVDS 1-Bit High Speed Differential Receiver
February 2002 Revised February 2002
FIN1002 LVDS 1-Bit High Speed Differential Receiver
General Description
This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data. The FIN1002 can be paired with its companion driver, the FIN1001, or with any other LVDS driver.
Features
s Greater than 400Mbs data rate s 3.3V power supply operation s 0.4ns maximum pulse skew s 2.5ns maximum propagation delay s Bus pin ESD (HBM) protection exceeds 10kV s Power-Off over voltage tolerant input and output s Fail safe protection for open-circuit and non-driven, shorted or terminated conditions s High impedance output at VCC < 1.5V s Meets or exceeds the TIA/EIA-644 LVDS standard s 5-Lead SOT23 package saves space
Ordering Code:
Order Number FIN1002M5 FIN1002M5X Package Number MA05B MA05B Package Description 5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel] 5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel]
Pin Descriptions
Pin Name ROUT RIN+ RIN- VCC GND NC Description LVTTL Data Output Non-inverting Driver Input Inverting Driver Input Power Supply Ground No Connect
Connection Diagram
Pin Assignment for SOT package
Function Table
Input RIN+ L H RIN- H L Outputs ROUT L H H
Top View
Fail Safe Condition
H = HIGH Logic Level L = LOW Logic Level Fail Safe = Open, Shorted, Terminated
(c) 2002 Fairchild Semiconductor Corporation
DS500730
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FIN1002
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Voltage (RIN+, RIN-) DC Output Voltage (DOUT) DC Output Current (IO) Storage Temperature Range (TSTG) Max Junction Temperature (TJ) Lead Temperature (TL) (Soldering, 10 seconds) 260C
-0.5V to +4.6V -0.5V to +4.6V -0.5V to +6V
16 mA
Recommended Operating Conditions
Supply Voltage (VCC) Input Voltage (VIN) Magnitude of Differential Voltage (|VID|) Common-mode Input Voltage (VIC) Operating Temperature (TA) ESD (Human Body Model) All Pins LVDS pins to GND ESD (Machine Model) 8kV 10kV 400V (0V + |VID| /2) to (2.4 - |VID|/2) 100mV to VCC 3.0V to 3.6V 0 to VCC
-65C to +150C
150C
-40C to +85C
Note 1: The "Absolute Maximum Ratings": are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol VTH VTL IIN II(OFF) VOH VOL VIK ICC CIN COUT Parameter Differential Input Threshold HIGH Differential Input Threshold LOW Input Current Power-OFF Input Current Output HIGH Voltage Output LOW Voltage Input Clamp Voltage Power Supply Current Input Capacitance Output Capacitance Test Conditions See Figure 1; VIC = +0.05V, 1.2V, or 2.35V See Figure 1; VIC = +0.05V, 1.2V, or 2.35V VIN = 0V or VCC VCC = 0V, VIN = 0V or 3.6V IOH = -100 A IOH = -8 mA IOH = 100 A IOL = 8 mA IIK = -18 mA (RIN+ = 1V and RIN- = 1.4V), or (RIN+ = 1.4V and RIN- = 1V) VCC = 3.3V VCC = 0V -1.5 VCC - 0.2 2.4 3.3 3.1 0.0 0.16 0.8 4 2.3 2.8 7 0.2 0.5 -100 20 20 Min Typ (Note 2) 100 Max Units mV mV A A V V V mA pF pF
Note 2: All typical values are at TA = 25C and with VCC = 3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol tPLH tPHL tTLH tTHL tSK(P) tSK(PP) Parameter Propagation Delay LOW-to-HIGH Propagation Delay HIGH-to-LOW Output Rise Time (20% to 80%) Output Fall Time (80% to 20%) Pulse Skew |tPLH - tPHL| Part-to-Part Skew (Note 4) |VID| = 400 mV, CL = 10 pF See Figure 1 and Figure 2 Test Conditions Min 0.9 0.9 Typ (Note 3) 1.5 1.5 0.6 0.5 0.02 0.4 1.0 2.5 2.5 Max Units ns ns ns ns ns ns
Note 3: All typical values are at TA = 25C and with VCC = 3.3V. Note 4: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
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FIN1002
Note A: All input pulses have frequency = 10MHz, tR or tF = 1ns Note B: CL includes all probe and fixture capacitances
FIGURE 1. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit
FIGURE 2. LVDS Input to LVTTL Output AC Waveforms
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FIN1002
DC / AC Typical Performance Curves
FIGURE 3. Output High Voltage vs. Power Supply Voltage
FIGURE 4. Output Low Voltage vs. Power Supply Voltage
FIGURE 5. Output Short Circuit Current vs. Power Supply Voltage
FIGURE 6. Power Supply Current vs. Frequency
FIGURE 7. Power Supply Current vs. Ambient Temperature
FIGURE 8. Differential Propagation Delay Power Supply Voltage
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FIN1002
DC / AC Typical Performance Curves
(Continued)
FIGURE 9. Differential Propagation Delay vs. Ambient Temperature
FIGURE 10. Differential Skew vs. Power Supply Voltage
FIGURE 11. Differential Skew vs. Ambient Temperature
FIGURE 12. Differential Propagation Delay vs. Differential Input Voltage
FIGURE 13. Differential Propagation Delay vs. Common-Mode Voltage 5
FIGURE 14. Transition Time vs. Power Supply Voltage www.fairchildsemi.com
FIN1002
DC / AC Typical Performance Curves
(Continued)
FIGURE 15. Transition Time vs. Ambient Temperature
FIGURE 16. Differential Propagation Delay vs. Load
FIGURE 17. Differential Propagation Delay vs. Load
FIGURE 18. Transition Time vs. Load
FIGURE 19. Transition Time vs. Load
FIGURE 20. Power Supply Current vs. Power Supply Voltage
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FIN1002 LVDS 1-Bit High Speed Differential Receiver
Physical Dimensions inches (millimeters) unless otherwise noted
5-Lead SOT23, JEDEC MO-178, 1.6mm Package Number MA05B
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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